This article presents a state-of-the-art design for a limitless impulse response (IIR) filter that can be easily reconfigured for use in real-time software. Using a vedic multiplication strategy, this work demonstrates the excellent general performance of a recursive or Infinite Impulse Response (IIR) filter. The number of repeats may be kept to a minimum and the processor's overall performance is improved by the reduction of computational delay and hardware. This research investigates the impact of different filter architectures on the development process and overall performance. To enforce and evaluate the planned filter's functionality, simulation is used across three independent platforms. The first system is MATLAB/ SIMULINK, the software package utilised to implement the IIR filter. The second strategy is called "HDL - Cosimulation," and it involves using SIMULINK's already-present tools in order to translate the formulated filter-out method into VHDL, the language used to describe very fast integrated circuits. The third approach uses Xilinx System Generator's pre-existing building components to physically realise the filter design. The method shown here allows the proposed filter to be implemented locally inside the FPGA device of interest.